Photo file: 
Full name: 
Jennifer Olson Hasler
Job title: 
Professor
Email address: 
Work phone: 
404/894-2984
Fax: 
404.894.4641
Office: 
TSRB 405

Dr. Jennifer Hasler received her B.S.E. and M.S. degrees in electrical engineering from Arizona State University in August 1991. She received her Ph.D. in computation and neural systems from California Institute of Technology in February 1997.

Dr. Hasler is a professor at the Georgia Institute of Technology in the School of Electrical and Computer Engineering; Atlanta is the coldest climate in which Dr. Hasler has lived.

Dr. Hasler founded the Integrated Computational Electronics (ICE) laboratory at Georgia Tech, a laboratory affiliated with the Laboratories for Neural Engineering.

Dr. Hasler is a member of Tau Beta P, Eta Kappa Nu, and the IEEE.

Research interests: 
  • Analog-Digital Signal Processing / Mixed Signal integrated circuits (Systems on a chip)
  • Scaling of deep submicron devices
  • Floating-gate devices, circuits, and systems
  • The use of floating-gate MOS transistors to build "smart" interfaces for MEMS sensors
  • Low power electronics
  • Analog VLSI models of on on-chip learning and Sensory processing in Neurobiology
Distinctions: 
  • 2011 Georgia Tech Outstanding Doctoral Thesis Advisor Award
  • 2002 Office of Naval Research Young Investigator.
  • Paul Raphorst best paper award, IEEE Electron Devices Society, 1997
  • Finalist for the Packard Foundation Young Investigator Fellowships
  • Guest Editor for special issue on Floating-Gate Circuits and Systems in IEEE Transactions on Circuits and Systems II. Summer 2000
  • Organizing Session Co-chair, Silicon Learning Systems, International Conference on Circuits and Systems, Monterey, 1998
  • Organizing Session Chair: Floating-Gate Devices and Circuits, International Conference on Circuits and Systems, Orlando, 1999
  • Organizing Session Chair (Invited), Floating-Gate and Neuromorphic Circuits, Midwest Circuits and Systems, Las Cruces, NM, 1999
  • NSF Career Award, "Analog VLSI Integrated Circuits for Real-Time Control"

Paul Hasler, "Continuous-Time Feedback in Floating-Gate MOS Circuits,'' IEEE Transactions on Circuits and Systems II, in Press.

C. Diorio, J. Dugger, Paul Hasler, B.A. Minch: "Adaptive Circuits and Synapses Using pFET Floating-Gate Devices," in Gert Cauwenbergs Learning in Silicon, Kluwer Acdemic, pp. 33-65, 1999.

Paul Hasler and Jeff Dugger, "Correlation Learning Rule in Floating-Gate pFET Synapses," IEEE Transactions on Circuits and Systems II, in Press.

Matt Kucic, AiChen Low, Paul Hasler, and Joe Neff, "A Programmable Continuous-time Floating-Gate Fourier Processor,'' IEEE Transactions on Circuits and Systems II, in Press.

Paul Hasler, Bradley A. Minch, Jeff Dugger, and Chris Diorio, "Adaptive Circuits and Synapses Using pFET Floating-Gate Devices," in Gert Cauwenbergs, Learning in Silicon, Kluwer Acdemic Publisher, 1999, pp. 33-65.

Paul Hasler, Bradley A. Minch, and Chris Diorio, "An Autozeroing Floating-Gate Amplifier,'' IEEE Transactions on Circuits and Systems II in Press.

A. Andreou, C. Diorio, Paul Hasler, C.A. Mead, B. A. Minch: "Impact ionization and hot-electron injection derived consistently from Boltzmann transport," VLSI Design, vol. 8, no. 1-4, pp. 455-461, 1998.

Paul E. Hasler: "Floating-gate CMOS Analog Memory Cell Array," Proceedings of the IEEE ISCAS, Monterey, CA, May/June 1998 (R. Harrison and B.A. Minch), 1998.

Paul E. Hasler: "Floating-gate Devices and Circuits," presentation to the Motorola SPS Phoenix Group/GTAC, 1998.

C. Diorio, Paul E. Hasler, B.A. Minch: "Multiple-input Translinear Element Networks," Proceedings of the IEEE ISCAS, Monterey, CA, May/June 1998, 1998.

C. Diorio, Paul E. Hasler, B.A. Minch: "An Autozeroing Floating-gate Bandpass Filter," Proceedings of the IEEE ISCAS, Monterey, CA, May/June 1998, 1998.

C. Diorio, Paul E. Hasler, B.A. Minch: "The Multiple-input Translinear Element: A Versatile Circuit Element," Proceedings of the IEEE ISCAS, Monterey, CA, May/June 1998, 1998.

C. Diorio, Paul E. Hasler, B.A. Minch: "Continuous-time Feedback in Floating-gate MOS Circuits," Proceedings of the IEEE ISCAS, Monterey, CA, May/June 1998, 1998.

P. Hasler, A. Andreou, C. Diorio, B. A. Minch, and C. A. Mead, "Impact ionization and hot-electron injection derived consistently from Boltzmann transport," VLSI Design, vol. 8, no. 1-4, 1998, pp. 455-461.

C. Diorio, Paul E. Hasler, B.A. Minch: "A Four-quadrant Floating-gate Synapse," Proceedings of the IEEE ISCAS, Monterey, CA, May/June 1998, 1998.

A. Apsel, Paul E. Hasler, T. Stanford: "An Adaptive Front End for Olfaction," Proceedings of the IEEE ISCAS, Monterey, CA, May/June 1998, 1998.

Paul E. Hasler: "Floating-gate Memories and Circuits," presented at the ECE Student Seminar, 1998.

C. Diorio, Paul E. Hasler, C. Mead, B.A. Minch: "A Floating-gate MOS Learning Array with Locally Computer Weight Update," IEEE Transactions on Electron Devices, vol. 44, no. 112, pp. 2281-2289, 1997.

Paul E. Hasler: "Adaptive Analog Circuits," presented at the Georgia Tech Analog Consortium (GTAC) Research Review, 1997.

C. Diorio, P. Hasler, B. A. Minch, and C. A. Mead, "A Single-Transistor Silicon Synapse," IEEE Transactions on Electron Devices, vol. 43, no. 11, 1996, pp.1972-1980. Winner of the Paul Raphorst best paper award, IEEE Electron Devices Society, 1997.

C. Diorio, Paul Hasler, C.A. Mead, B.A. Minch: "A Single-Transistor Silicon Synapse," IEEE Transactions on Electron Devices, Winner of the Paul Raphorst best paper award, IEEE Electron Devices Society, 1997, vol. 43, no. 11, pp. 1972-1980, 1996.

P. Hasler, C. Diorio, B. A. Minch, and C.A. Mead, "Single transistor learning synapses," in Gerald Tesauro, David S. Touretzky, and Todd K. Leen (eds.), Advances in Neural Information Processing Systems 7, MIT Press, Cambridge, MA, 1995, pp. 817-824.

C. Diorio, Paul Hasler, B.A. Minch: "An Autozeroing Floating-Gate Amplifier," IEEE Transactions on Circuits and Systems II, in Press.

Paul Hasler: "Continuous-Time Feedback in Floating-Gate MOS Circuits," IEEE Transactions on Circuits and Systems II, in Press.

C. Diorio, Paul Hasler: "in Gerald Tesauro, David S. Touretzky, and Todd K. Leen (eds.), Advances in Neural Information Processing Systems 7," MIT Press, Cambridge, MA, no. 817, p. 824, 1995.

J. Dugger, Paul Hasler: "Correlation Learning Rule in Floating-Gate pFET Synapses," IEEE Transactions on Circuits and Systems II, in Press.

Paul Hasler, M. Kucic, A.C. Low, J. Neff: "A Programmable Continuous-time Floating-Gate Fourier Processor," IEEE Transactions on Circuits and Systems II, in Press.

Last revised August 9, 2017

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