Asif Khan received his Ph.D. in electrical engineering and computer sciences from the University of California, Berkeley in 2015 and his B.S. degree in electrical and electronic engineering from Bangladesh University of Engineering and Technology (BUET) in 2007. He joined the School of Electrical and Computer Engineering at the Georgia Institute of Technology as a tenure-track assistant professor in the Spring of 2017.
Dr. Khan’s interests lie at the intersection of electrical engineering, materials science, and the physics of computation. His group fabricates novel nanoelectronic devices that leverage new physics and phenomena in emerging material systems (such as ferro-/anti-ferroelectrics, multiferroics, complex and transition metal oxides and correlated electron systems). The end goal of his research is to synergize these device-level innovations with existing or new circuits, architectures, and systems concepts such that classical limitations of CMOS platforms can be transcended and new computing paradigms can be envisioned. His work led to the first experimental proof-of-concept demonstration of the negative capacitance–a novel physical phenomenon that can lead to ultra-low power computing and memory platforms by overcoming the fundamental "Boltzmann Limit" of 60 mV/decade subthreshold swing in field-effect transistors.
- Qualcomm Innovation Fellowship (2012-13)
- Silver prize at the 5th TSMC Outstanding Student Research Award (2011)
- University Gold medal, Bangladesh University of Engg. & Tech. (2011)
- Kintarul Haque Gold Medal, Bangladesh University of Engg. & Tech. (2011)
- 1st prize in IEEE Region 10 Undergraduate Student Paper Contest (2006)
- 2nd prize in the IEEE History Society Undergraduate Student Paper Contest (2004)
Z. Wang, S. Khandelwal, A. I. Khan. “Ferroelectric oscillators and their coupled networks," IEEE Electron Device Letters (2017).
A. I. Khan, K. Chatterjee, J. P. Duarte, Z. Lu, A. Sachid, S. Khandelwal, R. Ramesh, C. Hu & S. Salahuddin. “Negative capacitance in short channel FinFETs externally connected to an epitaxial ferroelectric capacitor," IEEE Electron Dev. Lett. 37, 111 (2016).
A. I. Khan, and S. Salahuddin, “Extending CMOS with negative capacitance," in CMOS and Beyond: Logic Switches for Terascale Integrated Circuits, T.-J. K. Liu and K. Kuhn, Editors, Cambridge University Press (2015).
A. I. Khan, X. Marti, C. Serrao, R. Ramesh & S. Salahuddin, “Voltage controlled ferroelastic switching in Pb(Zr0.2Ti0.8)O3 thin films," Nano Lett. 15, 2229 (2015).
A. I. Khan, K. Chatterjee, B. Wang, S. Drapcho, L. You, C. Serrao, S. R Bakaul, R. Ramesh, & S. Salahuddin. “Negative capacitance in a ferroelectric capacitor," Nature Materials 14, 182 (2015).
A. I. Khan, D. E. Nikonov, S. Manipatruni, T. Ghani, & I. A. Young. “Voltage induced magnetostrictive switching of nanomagnets: Strain assisted spin transfer torque random access memory," Appl. Phys. Lett. 104, 262407 (2014).
W. Gao, A. I. Khan , X. Marti, C. Nelson, C. Serrao, J. Ravichandran, R. Ramesh, & S. Salahuddin. “Room-temperature negative capacitance in a ferroelectric-dielectric superlattice heterostructure," Nano Lett. 14, 5814 (2014).
A. I. Khan, D. Bhowmik, P. Yu, S. J. Kim, X. Pan, R. Ramesh, & S. Salahuddin. “Experimental evidence of ferroelectric negative capacitance in nanoscale heterostructures," Appl. Phys. Lett. 99, 113501 (2011).
A. I. Khan, C. W. Yeung, C. Hu, & S. Salahuddin. “Ferroelectric negative capacitance MOSFET: Capacitance tuning & antiferroelectric operation," Proc. Intl. Electron Devices Meeting (IEDM), pp. 11-3 (2011).
Last revised July 2, 2018