Photo file: 
Full name: 
Arijit Raychowdhury
Job title: 
Associate Professor
; ON Semiconductor Professor
Email address: 
Work phone: 
404/894-1789
Office: 
Klaus 2362

Arijit Raychowdhury is currently an Associate Professor in the School of Electrical and Computer Engineering at the Georgia Institute of Technology where he joined in January, 2013. He received his Ph.D. degree in Electrical and Computer Engineering from Purdue University (2007) and his B.E. in Electrical and Telecommunication Engineering from Jadavpur University, India (2001). His industry experience includes five years as a Staff Scientist in the Circuits Research Lab, Intel Corporation, and a year as an Analog Circuit Designer with Texas Instruments Inc. His research interests include low power digital and mixed-signal circuit design, design of power converters, sensors and exploring interactions of circuits with device technologies.

Dr. Raychowdhury holds more than 25 U.S. and international patents and has published over 80 articles in journals and refereed conferences. He serves on the Technical Program Committees of DAC, ICCAD, VLSI Conference, and ISQED and has been a guest associate-editor for JETC. He has also taught many short courses and invited tutorials at multiple conferences, workshops and universities. He is the winner of the Intel Labs Technical Contribution Award, 2011; Dimitris N. Chorafas Award for outstanding doctoral research, 2007; the Best Thesis Award, College of Engineering, Purdue University, 2007; Best Paper Awards at the International Symposium on Low Power Electronic Design (ISLPED) 2012, 2006; IEEE Nanotechnology Conference, 2003; SRC Technical Excellence Award, 2005; Intel Foundation Fellowship, 2006; NASA INAC Fellowship, 2004; M.P. Birla Smarak Kosh (SOUTH POINT) Award for Higher Studies, 2002; and the Meissner Fellowship 2002. Dr. Raychowdhury is a Senior Member of the IEEE.

Research interests: 
  • Design of low power digital circuits with emphasis on adaptability and resiliency
  • Design of voltage regulators, adaptive clocking, and power management
  • Device-circuit interactions for logic and storage
  • Alternative compute architectures
Distinctions: 
  • Senior Member, IEEE, 2013
  • Intel Labs Technical Contribution Award, 2011
  • Dimitris N. Chorafas Award for outstanding doctoral research, 2007
  • Best Thesis Award, College of Engineering, Purdue University, USA, 2007
  • Best Paper Awards: International Symposium on Low Power Electronic Design (ISLPED) 2012,2006; IEEE Nanotechnology Conference, 2003
  • SRC Technical Excellence Award, Research Team Member, 2005
  • Intel Foundation Fellowship 2006, NASA INAC Fellowship 2004, Meissner Fellowship 2002

A. Raychowdhury, D. Somasekhar, J. Tschanz, and V. De, "A fully-digital phase-locked low dropout regulator in 32nm CMOS," Proceedings of the VLSI Circuit Symposium, June 2012.

A. Raychowdhury, B. Geuskens, K. Bowman, J. Tschanz, S.-L. Lu, T. Karnik, M. Khellah, V. De, "Tunable Replica Bits for Dynamic Variation Tolerance in 8T SRAM Arrays," Journal of Solid State Circuits (JSSCC), Vol-46, Issue 4, April 2011.

A. Raychowdhury, B. Geuskens, J. Kulkarni, J. Tschanz, K. Bowman, T. Karnik, S.-L. Lu, V. De, M. Khellah, "PVT & Aging Adaptive Word-Line Boosting for 8T SRAM Power reduction," Proceedings of the International Solid State Circuit Conference (ISSCC), 2010.

A. Raychowdhury, D. Somasekhar, T. Karnik, V. De, "Design Space and Scalability Exploration of 1T-1STT MTJ Memory Arrays in the Presence of Variability and Disturbances," Digest of International Electron Device Meeting (IEDM), Dec. 2009.

S. Kumar Gupta, A. Raychowdhury and K. Roy, "Compact models considering incomplete voltage swing in complementary metal oxide semiconductor circuits at ultralow voltages: A circuit perspective on limits of switching energy," Journal of Applied Physics, Vol. 105, Issue 9, 2009.

Last revised May 16, 2016

Map of Georgia Tech

Georgia Institute of Technology
North Avenue, Atlanta, GA 30332
Phone: 404-894-2000