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ECE Course Syllabus

ECE4100 Course Syllabus


Advanced Computer Architecture (3-0-0-3)

CMPE Degree
This course is Elective for the CMPE degree.

EE Degree
This course is Elective for the EE degree.

Lab Hours
0 supervised lab hours and 0 unsupervised lab hours

Course Coordinator
Qureshi,Moinuddin K

ECE 3057


Catalog Description
Comprehensive coverage of the architecture and system issues that confront the design of high performance workstation/PC computer architectures with emphasis on quantitative evaluation. Credit is not allowed for both ECE 4100 and any of the following courses: ECE 6100, CS 4290, CS 6290.

Hennessey & Patterson, Computer Architecture: A Quantitative Approach (6th edition), Morgan Kaufmann, 2017. ISBN 9780128119051 (required)

Course Outcomes
Upon successful completion of this course, students should be able to:
  1. Perform quantiative evalution of in-order and out-of-order processors.
  2. Analyze modern memory systems.
  3. Perform power and energy trade-offs in modern computer systems.

Student Outcomes
In the parentheses for each Student Outcome:
"P" for primary indicates the outcome is a major focus of the entire course.
“M” for moderate indicates the outcome is the focus of at least one component of the course, but not majority of course material.
“LN” for “little to none” indicates that the course does not contribute significantly to this outcome.
  1. ( P ) An ability to identify, formulate, and solve complex engineering problems by applying principles of engineering, science, and mathematics
  2. ( M ) An ability to apply engineering design to produce solutions that meet specified needs with consideration of public health, safety, and welfare, as well as global, cultural, social, environmental, and economic factors
  3. ( LN ) An ability to communicate effectively with a range of audiences
  4. ( LN ) An ability to recognize ethical and professional responsibilities in engineering situations and make informed judgments, which must consider the impact of engineering solutions in global, economic, environmental, and societal contexts
  5. ( LN ) An ability to function effectively on a team whose members together provide leadership, create a collaborative and inclusive environment, establish goals, plan tasks, and meet objectives
  6. ( M ) An ability to develop and conduct appropriate experimentation, analyze and interpret data, and use engineering judgment to draw conclusions
  7. ( LN ) An ability to acquire and apply new knowledge as needed, using appropriate learning strategies.

Topical Outline
Performance Evaluation
      Metrics for performance (MIPS, IPC, Execution time)
      Different means and when it is right to use them
      Amdahl?s law
      Review basic principles, hazards, dependencies   
      Data hazards, scoreboards, Tomasulo algorithm  
      Control hazards, advanced branch prediction techniques    
      Multiple instruction issue   
      Precise exception and in-order-retirement
      Reorder buffer
Memory systems   
      Review of caches principles   
      Techniques to reduce miss rate, hit time, miss time (multi-level caches)
      DRAM memory: basic organization and operation (row hit/miss) 
      Prefetching and simple prefetch algorithms (stream/stride)
      Virtual memory   
Parallel Computers    
      Taxonomy of parallel architectures, parallel applications 
      Shared memory and message passing computers
      Multi-core processors: shared cache and private cache
      Multi-threading: Coarse-grained, fine-grained, and SMT 
      Vectors and SIMD
      GPU basic organization and operation   
      Coherence protocols: bus based and directory based    
      Memory consistency models, relaxed consistency models 
      Synchronization, locks and barriers  
      Interconnection networks, bi-section bandwidth, topologies
Power and Energy Issues    
       Basics of energy dissipation: dynamic and static
       Clock gating and power gating
       Dynamic voltage and frequency scaling  
       Microarchitecture power models
Storage Systems
      Reliability: RAID, RAID-1 to RAID-5 
      Parity and error-correction code