ECE Course Syllabus

ECE2031 Course Syllabus


Digital Design Laboratory (1-3-2)

(ECE2020/2030 and (ECE 2035* or ECE 2036*)) or CS 2110 [all courses min C] * Prerequisites indicated with an asterisk may be taken concurrently with ECE2031


Catalog Description
Design and implementation of digital systems, including a team design project. CAD tools, project design methodologies, logic synthesis, and assembly language programming.

Collins, & Twigg, ECE 2031 Lab Manual (2nd edition), Kendall/Hunt Publishing Company. ISBN 9780757571572 (required) (comment: This lab manual is revised frequently and must be purchased new. Required assignments from the manual must be torn from the book and turned in for grading. )

Hamblen, Hall, & Furman, Rapid Prototyping of Digital Systems, SOPC Edition, Springer Publishers. ISBN 9780387726700 (required) (comment: )

Perelman, Paradis & Barrett, The Mayfield Handbook of Technical Scientific Writing, Mayfield Publishing, 1998. ISBN 9781559346474(optional) (comment: This handbook is available FREE on-line at

258608, Wire Jumper Kit "NO RETURNS", XX Supply. ISBN 2818440011900 (required)

Course Outcomes
Upon successful completion of this course, students should be able to:
  1. implement combinational logic circuits both with TTL devices on a protoboard and within a complex PLD.
  2. analyze the timing of digital circuits with oscilloscopes and logic analyzers.
  3. design and implement state machines to meet design specifications.
  4. design circuits with a graphical schematic CAD editor.
  5. simulate circuits within a CAD tool and compare to design specifications.
  6. design, implement, and simulate circuits using VHDL.
  7. implement a simple computer within a PLD.
  8. write machine language programs and assembly language programs for the simple computer.
  9. use a complex sequential logic circuit as part of a solution to an open-ended design problem.
  10. write laboratory reports and documentation conforming to technical writing standards.
  11. work effectively as team members to develop and write a group report.
  12. work effectively as team members to design an approved project.

Topical Outline
Laboratory projects will use a PC-based CAD environment that supports schematic capture, logic simulation, and HDL-based logic sysnthesis on FPGAs (field-programmable gate arrays).  Small-scale integrated circuits will be used for early labs, then HDL-based logic synthesis on FPGA-based design boards will be used for more advanced design implementations, including exposure to mixed design-entry methods.  The semester will culminate with design projects specified and undertaken by teams of three to five students.  Technical writing skills are developed through laboratory reports, project documentation, and an oral presentation.

*  CAD Tools
*  Logic Synthesis using an HDL
*  HDL models of basic gates and logic operations
*  Combinational design using multiple methods: primitive gates, schematic capture for FPGAs, and VHDL
*  HDL based simulation and synthesis with FPGAs
*  Examination of real timing issues on hardware using timing simulation, oscilloscope, and logic analyzer
*  State machine specification, design, and simulation
*  State machine implementation with multiple methods
*  Design verification with logic analyzer
*  HDL models of data storage elements
*  ROM and RAM implementations on FPGA boards
*  Hardware design of a simple computer with ALU, registers, control unit, memory, instructions, and I/O
*  HDL-based simple computer simulation and implementation on FPGA board
*  Machine language and assembly language programming for the simple computer
*  Simulation and implementation of programs on the FPGA board
*  Final design project problem specification (examples: video game, control application, robot, or contest)
*  Hardware and tools available to solve the final design project problem 
*  Project engineering issues: top-down vs. bottom-up design, hierarchical decomposition, and modularity