Photo file: 
Full name: 
Muhannad S Bakir
Job title: 
Professor
; Associate Director, Interconnect and Packaging Center
Technical Interest Groups: Microelectronics/Microsystems
Email address: 
Work phone: 
4043856276
Fax: 
404.894.4641
Office: 
Marcus 4135

Muhannad S. Bakir received the B.E.E. degree from Auburn University, Auburn, AL, in 1999 and the M.S. and Ph.D. degrees in electrical and computer engineering from the Georgia Institute of Technology (Georgia Tech) in 2000 and 2003, respectively.

He is currently a professor in the School of Electrical and Computer Engineering at Georgia Tech. Dr. Bakir is the recipient of the 2013 Intel Early Career Faculty Honor Award, 2012 DARPA Young Faculty Award, 2011 IEEE CPMT Society Outstanding Young Engineer Award, and was an Invited participant in the 2012 National Academy of Engineering Frontiers of Engineering Symposium. In 2015, Dr. Bakir was elected by the IEEE CPMT Society to serve as a distinguished lecturer for a four-year term. Dr. Bakir and his research group have received more than 25 conference and student paper awards including six from the IEEE Electronic Components and Technology Conference (ECTC), four from the IEEE International Interconnect Technology Conference (IITC), and one from the IEEE Custom Integrated Circuits Conference (CICC). Dr. Bakir’s group was awarded the 2014 Best Paper of the IEEE Transactions on Components Packaging and Manufacturing Technology in the area of advanced packaging. Dr. Bakir is an editor of a book entitled Integrated Interconnect Technologies for 3D Nanoelectronic Systems (with James D. Meindl) and is the author/coauthor of more than 180 journal publications and conference proceedings, 12 US patents, and the presenter of multiple international conference tutorials, including an invited tutorial on 3D IC and interconnect technologies at the International Solid-State Circuits Conference (ISSCC).

Dr. Bakir is an editor of IEEE Transactions on Electron Devices and an associate editor of IEEE Transactions on Components, Packaging and Manufacturing Technology.

Research interests: 
  • Heterogeneous microsystem design and integration, including 2.5D and 3D ICs and packaging
  • Advanced cooling and power delivery for emerging system architectures
  • Electrical and photonic interconnect technologies
  • Biosensor technologies and their integration with CMOS
  • Nanofabrication technologies
Distinctions: 
  • 2013 Intel Early Career Faculty Honor Award
  • 2012 DARPA Young Faculty Award
  • 2012 National Academy of Engineering Frontiers of Engineering Symposium Invited Participant
  • 2011 IEEE CPMT Outstanding Young Engineer Award
  • Semiconductor Research Corporation (SRC) Inventor Recognition Awards (2002, 2005, 2009)
  • Associate Director of the Georgia Tech Interconnect and Packaging Center (IPC), an SRC Center of Excellence
  • Best Invited Paper Award from the 2007 IEEE Custom Integrated Circuits Conference (CICC)
  • Best Paper Award from the 2002 Electronic Components and Technology Conference (ECTC)
  • Outstanding Paper Award from the 2007 Electronic Components and Technology Conference (ECTC)
  • Co-recipient of the Best Student Paper Awards from the 2005, 2006, 2008 IEEE International Interconnect Technology Conference (IITC)
  • Co-recipient of the Motorola Electronic Packaging Student Paper Award from the 2008 Electronic Components and Technology Conference (ECTC)
  • Co-recipient of the SRC TECHCON 2009 Best in Session Paper Award
  • Co-recipient of the Best Student Paper Award from the 2009 International Symposium on Microelectronics
  • Twelve issued US Patents
  • Member of the International Technology Roadmap for Semiconductors (ITRS)
  • Associate Editor for IEEE Transactions on Electronics Packaging Manufacturing

H. Oh, P. A. Thadesar, G. S. May, and M. S. Bakir, "Low-loss air-isolated through-silicon vias for silicon interposers," IEEE Microw. Wirel. Components Lett., vol. 26, no. 3, pp. 168-170, Mar. 2016.

M. Zia, T. Chi, J. Park, A. Su, J. L. Gonzalez, P. K. Jo, M. P. Styczynski, H. Wang, and M. S. Bakir, "A 3D integrated electronic microplate platform for lowcost repeatable biosensing applications," IEEE Trans. on Components, Packaging and Manufacturing Technology, vol. 6., no. 12, 2016.

C. Wan, T. K. Gaylord, and M. S. Bakir, "Grating design for interlayer optical interconnection of in-plane waveguides," Applied Optics, vol. 55, no.10, pp. 2601-2610, Oct. 2016.

X. Zhang, V. Kumar, H. Oh, L. Zheng, G. May, A. Naeemi, and M. S. Bakir, "Impact of on-chip interconnect on the performance of 3D integrated circuits with through silicon vias Part II," IEEE Trans. Electron Devices, vol. 63, no. 6, pp. 2510-2516, June 2016.

P. Thadesar, X. Gu, R. Alapati and M. S. Bakir, "TSVs: Drivers, performance and innovations (Invited)," IEEE Trans. on Components, Packaging and Manufacturing Technology, vol. 6, no. 3, pp. 455-463, Mar. 2016.

M. Bakir, A. Glebov, M. Lee, P. Kohl, and J. Meindl, "Mechanically flexible chip-to-substrate optical interconnections using optical pillars," IEEE Trans. Adv. Packaging, vol. 31, no. 1, pp. 143-153, 2008.

M. Bakir, B. Dang, and J. Meindl, "Revolutionary nanosilicon ancillary technologies for ultimate-performance gigascale systems," in Proc. IEEE Custom Integrated Circuits Conf., 2007.

Last revised April 11, 2017

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