ECE and PRC Students Sweep Poster Prizes at the 2014 Global Interposer Technology Workshop
Hanju Oh and Dibyajat Mishra shared the first place poster award at the IEEE Global Interposer Technology Conference, held November 5-7 at the Georgia Tech Global Learning Center.
Oh, A Ph.D. student in the Georgia Tech School of Electrical and Computer Engineering (ECE), is advised by ECE Associate Professor Muhannad Bakir and ECE Professor and College of Engineering Dean Gary May.
The title of his poster was “Electrical interconnect and microfluidic cooling within 3D ICs and silicon interposer”. Oh’s coauthors on the work were Li Zheng and Yue Zhang, his fellow Ph.D. students in the Integrated 3D Systems Group, which is led by Bakir.
The poster presented a three-dimensional integrated circuit (3D IC) system with an embedded microfluidic cooling heat sink (MFHS). In the proposed 3D IC system, high power tiers contain embedded MFHS and high-aspect ratio (23:1) through-silicon vias (TSVs) routed through the integrated MFHS. Each tier has dedicated solder-based electrical and fluidic microbumps for electrical interconnection and fluidic delivery, respectively. In addition, thermal characterization of a microfluidic heat sink with embedded TSVs was also presented for the first time.
Mishra, a newly graduated Ph.D. from the School of Materials Science and Engineering, was advised by 3D Systems Packaging Research Center Director and ECE Professor Rao Tummala and 3D Systems Packaging Research Center research faculty member P.M. Raj.
Mishra’s poster, titled “Multilayered ferromagnetic –polymer composite structures and their integration for power supply inductors,” presented the material modeling, design, processing, characterization and integration of a new class of multilayered ferromagnetic-polymer composite structures for high-density power inductor applications. The multilayered composite structures comprise of stacked high-permeability, high-Ms, low-coercivity magnetic layers with ultrathin polymer adhesives. The adhesive acts as an insulating layer to reduce eddy current losses while also enabling high permeability at higher operating frequencies. The final outcome was the achievement of high inductance densities with improved power handling in 1-10 MHz frequency regime.
Packaging Research Center students also garnered the second and third place awards. The second place poster prize was awarded to Brett Sawyer, “Design and demonstration of 2.5D glass interposers at 40-50um bump pitch for 100 GB/s to 1 TB/s die-to-die bandwidth,” and Jialing Tong, “Modeling and characterization of taper through-package-vias (TPVs) in glass substrate”. Third place went to Ninad Shahane, “Metastable Cu-Sn interconnections for high-throughput ultrafine pitch SLID bonding,” and Ting-Chia Huang, “Low-temperature, low-pressure Cu Interconnections without solder at ultra-fine pitch”.
Last revised August 1, 2017