Zia’s IEEE T-CPMT Paper Named among Most Popular

Atlanta, GA
Muneeb Zia

Muneeb Zia

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Muneeb Zia is the first author on a paper that has been named as one of the five most popular papers from the IEEE Transactions on Components, Packaging, and Manufacturing Technology, according to 2017 usage statistics. Zia is a Ph.D. student in the Georgia Tech School of Electrical and Computer Engineering (ECE). 

The title of Zia's paper is “3-D Integrated Electronic Microplate Platform for Low-Cost Repeatable Biosensing Applications,” and it was published in the December 2016 issue (vol. 6, no. 12, pp. 1827-1833). The research presented in the paper aims at increasing the throughput and reducing the cost of drug screening by allowing reuse of biosensors being utilized for drug discovery. This, in turn, can help reduce the total time and cost of new drug development, which can otherwise take up to 15 years and cost an average of $3 billion. The reuse of the biosensor was achieved by microfabricating a 3-D integrated electronic microplate platform using through-silicon-vias (TSVs) and flexible interconnects that enabled high-density electrical interconnections between cells and the biosensor while circumventing the need of directly growing cells onto the biosensor. This work was enabled by a seedling grant from the Institute for Electronics and Nanotechnology.

Zia's coauthors on the paper are his Ph.D. advisor and ECE Professor Muhannad Bakir; Paul Jo and Joe Gonzalez, Zia's fellow Ph.D. students in the Integrated 3D Systems Group, which is also led by Bakir; ECE Assistant Professor Hua Wang and his recently graduated Ph.D. students, Taiyun Chi (now with Speedlink Technology, Inc. ) and Jong Seok Park (now an ECE postdoctoral fellow), of the Georgia Tech Electronics and Micro-System Lab; and Mark Styczynski, an associate professor in the School of Chemical and Biomolecular Engineering, and his Ph.D. student Amy Su. 

IEEE Transactions on Components, Packaging, and Manufacturing Technologypublishes research and application articles on modeling, design, building blocks, technical infrastructure, and analysis underpinning electronic, photonic and MEMS packaging.

Last revised June 25, 2018