Jong Seok Park and Tso-Wei Li won Intel/IBM/Catalyst Foundation Student Scholarship Awards at the 2015 IEEE Custom Integrated Circuits Conference (CICC), held September 28-30 in San Jose, California. They are both Ph.D. students in the Georgia Tech School of Electrical and Computer Engineering (ECE).
At this year’s IEEE-CICC, only two top ranked student papers were selected for this award by the wireless subcommittee, and both of these papers were from the Georgia Tech Electronics and Micro-System (GEMS) Lab, led by Hua Wang, who holds the Demetrius T. Paris Junior Professorship in ECE and who serves as Ph.D. advisor for both Park and Li.
Park’s award-winning paper is entitled, "A Highly Linear Dual-Band Mixed-Mode Polar Power Amplifier in CMOS with An Ultra-Compact Output Network," co-authored with Song Hu (an ECE Ph.D. student at the Georgia Tech GEMS Lab), Yanjie Wang (a staff scientist at Intel Labs), and Hua Wang. This work is based on a collaboration between the Georgia Tech GEMS Lab and Intel Labs.
There is an increasing interest in developing mixed-signal power amplifiers/transmitters in CMOS and employing them in next-generation wireless communication platforms. Such mixed-signal power amplifiers/transmitters explore the unparalleled computation capabilities in CMOS and leverage them to enhance large-signal radio-frequency performance, such as peak efficiency, back-off efficiency, and linearity. Park's paper exploits this mixed-signal power amplifier/transmitter design philosophy, and it proposes and demonstrates the world’s first highly linear digital polar power amplifier in a standard 65nm bulk CMOS process. The power amplifier is capable of operating at dual-frequencies without any band-selection switch or tuning element. Park's IC chip achieves the state-of-the-art performance of +28.1dBm/+26.0dBm power amplifier output power with 40.7%/27.0% drain efficiency at 2.6/4.5GHz. Mixed-signal linearization techniques allow the power amplifier to amplify a 256-QAM signal with 2.05%/1.03% EVM and +21.51dBm/+19.27dBm average output power at 2.35/4.7GHz.
Li’s award-winning paper is entitled "A 2-24GHz 360-Degree Full-Span Differential Vector Modulator Phase Rotator with Transformer-Based Poly-Phase Quadrature Network," co-authored with Park and Hua Wang. This work is based on a collaboration between the Georgia Tech GEMS Lab and the Air Force Research Lab (AFRL) at Wright-Patterson Air Force Base.
One of the major challenges in modern broadband phased-array systems is the synthesis of high-precision, phase-shifted radar signals for high-quality beam-forming. Existing broadband phase-shifting approaches often require frequency-dependent calibration tables or tuning elements, which inevitably complicate their use in in-field defense applications. Moreover, no reported designs can perform high-precision 360-degree phase shifting over a decade-wide bandwidth.
Li's paper addresses this unmet challenge by proposing and demonstrating a broadband vector modulator phase rotator based on a novel transformer-based polyphase network, achieving a first-ever decade-wide instantaneous bandwidth (2GHz-24GHz). The phase rotator is implemented in a standard 65nm bulk CMOS process. The maximum rms phase error is only 1.22 degrees within 1.5dB amplitude variation for full 360-degree phase interpolation from 2GHz to 24GHz. Li's design does not require any frequency tuning element, band selection switches, or frequency-dependent code compensation/look-up table. Such a unique "one-code-for-all-frequency" solution facilitates the development and deployment of ultra-broadband large-scaled phased-array systems.
Pictured in photo left to right at IEEE-CICC: Jong Seok Park, Don Thelen of ON Semiconductor and the IEEE-CICC Conference Chair, Tso-Wei Li, and Hua Wang.
Last revised August 1, 2017