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Photo file: 
photograph of Moinuddin Qureshi
Full name: 
Moinuddin K Qureshi
Job title: 
Technical Interest Groups: Computer Systems and Software
Email address: 
Klaus 2312

Dr. Moinuddin Qureshi joined the faculty of the Georgia Institute of Technology as an Associate Professor in August 2011. His research interests include computer architecture, scalable memory systems, fault tolerant computing, and analytical modeling of computer systems. He worked as a research staff member at IBM T.J. Watson Research Center from 2007 to 2011. While at IBM, he contributed to the design of efficient caching algorithms for Power 7 processors. He was awarded the IBM outstanding technical achievement award for his studies on emerging memory technologies for server processors. He holds five U.S. patents and has more than a dozen publications in flagship architecture conferences. He received his Ph.D. (2007) and M.S. (2003), both in Electrical Engineering from the University of Texas at Austin, and Bachelor of Electronics Engineering (2000) degree from University of Mumbai.

Research interests: 
  • High performance computer architecture
  • Scalable memory/storage system design
  • Architecting systems with emerging technology
  • Fault tolerant computing
  • Analytical modeling of computer systems
  • Hybrid and adaptive architectures
  • IBM Outstanding Technical Achievement (OTA) award for "Enterprise Innovations for Non-Volatile Memory", 2011
  • IBM PhD fellowship award, 2003-2006
  • IEEE Micro Top Picks from computer architecture conferences: 2007 and 2009
  • IBM third plateau inventor award for filing 12 patents, 2010
  • Program committee member of ISCA (2009-2012) and MICRO (2010, 2011)
  • 1st rank out of 1,470 students in Bachelor of Electronics Engineering examinations, Mumbai University, 2000

Moinuddin K. Qureshi, Andre Seznec, Luis Lastras, and Michele Franceschini, "Practical and Secure PCM Systems via Online Attack Detection”, Proceedings of the 17th Annual International Symposium on High-Performance Computer Architecture (HPCA-17), 2011.

M. Aater Suleman, Onur Mutlu, Moinuddin K. Qureshi, and Yale N. Patt, "Accelerating Critical Section Execution with Asymmetric Multi-Core Architectures", Proceedings of the Fourteenth International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS-14), Mar 2009. Also in IEEE MICRO Top Picks 2010

Moinuddin K. Qureshi, Viji Srinivasan and Jude Rivers, "Scalable High-Performance Main Memory System using Phase Change Technology", Proceedings of the 36th Annual International Symposium on Computer Architecture (ISCA-36), 2009.

Moinuddin K. Qureshi, John Karidis, Michele Franceschini, Viji Srinivasan, Luis Lastras and Bulent Abali, "Enhancing Lifetime and Security of Phase Change Memories via Start- Gap Wear Leveling", Proceedings of the International Symposium on Microarchitecture (MICRO-42), 2009.

Moinuddin K. Qureshi, Aamer Jaleel, Yale N. Patt, Simon C. Steely and Joel Emer, "Adaptive Insertion Policies for High Performance Caching", Proceedings of the 34th International Symposium on Computer Architecture (ISCA-34), 2007. Also in IEEE MICRO Top Picks 2008.

Moinuddin K. Qureshi and Yale N. Patt, "Utility Based Cache Partitioning: A Low Overhead High-Performance Runtime Mechanism to Partition Shared Caches", Proceedings of the 39th Annual International Symposium on Microarchitecture (MICRO-39), 2006.

Last revised November 15, 2019

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