LC-2 VHDL Synthesis and Simulation Model

The LC-2 computer is described in Introduction to Computing Systems from bits & gates to C & Beyond by Yale Patt and Sanjay Patel, McGraw Hill, 2001. This web page contains links to a VHDL model of the LC-2 computer designed to work with the free student edition Altera MaxPLUS II CAD tools (47Meg) ( readme file). It also can be implemented in hardware on the low-cost 70,000 gate student Altera UP 1X board. The control unit uses a VHDL state machine based on the state diagram found in Appendix C. An additional state was added to reset the processor.

Click here to download the required LC-2 design source files

The screen image below shows a typical simulation run of a short LC-2 program.

The LC-2 requires approximately 35,000 gates and it can be run on an Altera UP 1X board. The two pushbuttons are used for clock and reset. The seven segment displays contain the value of the PC. Additional logic has been added to provide a video display of the registers on an Altera UP 1X board as shown below. A monitor must be plugged into the UP 1X’s VGA connector to see the display.

Programs are contained in the file shown below, program.mif.

Compile and simulate LC2.vhd for simulations only. To run on the UP 1X board and generate the video output display, compile and download TOP_LC2.vhd. If the compiler design doctor option is turned off, large designs like the LC-2 will compile faster.

Additional information on how the VGA controller and video display circuit is synthesized and a meta assembler that can be used to assemble programs can be found in Rapid Prototyping of Digital Systems.