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Georgia Tech Embedded Systems Lab Projects

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Distrbuted Smart Cameras

We turned our single-camera gesture recognition system into a distributed smart camera system that performs gesture recognition across multiple cameras and a distributed computer network. This system does not rely on a centralized server to compare the results from multiple cameras. It uses peer-to-peer computing to perform the various steps in the gesture recognition system across the network. Distributed smart cameras make sense because data transfer is not free: it requires bandwidth, which may be particularly scarce in wireless networks, and it requires energy. Realistic installations of multiple-camera systems cannot rely on servers; distributed computing is a realistic choice for real-world multi-camera video analysis.

In turning a single-camera system into a distributed system, two control problems must be solved. First, when a person stands between two cameras, the processing nodes associated with those cameras must be able to share information. In order to reduce bandwidth, they should not pass raw video. Instead, they should transmit partial analysis.results. Second, the locus of control must be passed from node to node as the target moves around the area covered by the collection of cameras. The locus of control determines what node will fuse data if necessary and perform the final recognition steps.

In order to distribute control, we must be able to split the single-camera algorithm into parts, some of which are always done locally and others that may be done remotely. Region finding and ellipse fitting are two logical points at which to split our gesture recogntion system. These representations are compact but still local enough to avoid major problems during fusion. Our methodology can be used to turn other single-camera algorithms into distributed systems.

This work is part of our NSF ITR project with the University of Maryland.

We have also built a distributed smart camera system for tracking.

Software Radio

Software radio is a generic term for radios that perform some processing traditionally done in analog circuits using software. Software allows a radio to be more flexible. That flexibility can be used in several different ways: bandwidth scavenging, waveform synthesis, etc.

Unfortunately, processors aren't fast enough to make software radio easy to do for many realistic frequency bands and data rates.Although interesting, complex audio systems can be built using software running on DSPs, high-performance software radios will require more complex architectures. Realistic software radios will be heterogeneous multiprocessors. Heterogeneous multiprocessors are particularly important for portable software radio and any application in which power consumption is a design criterion.

We are collaborating on this project with Prof. Shuvra Bhattacharyya of the University of Maryland.

Embedded Software

Over the years we have developed several methods for optimizing loop-intensive embedded software. Most recently, we have applied retiming, a traditional hardware optimization, to code scheduling. Retiming provides a theoretical framework and practical method for provably-good scheduling in loop nests.

Memory systems play a major role in determining both the performance and energy consumption of embedded systems. We developed a process-level cache model for multi-tasking that allows tools to optimize the cache behavior of multi-process systems. With Mahmut Kandemir of Penn State, we wrote a survey on memory systems for the Proceedings of the IEEE.

With Joerg Henkel , then of NEC, we developed a novel model for multi-tasking that allows the OS to switch between several implementations of a task during execution. We use a combination of design-time and run-time methods to make sure that the schedule does not violate deadlines either during transient behavior or in steady state as a task switches implementations.

Multiprocessor System-on-Chip (MPSoC)

We have developed new architectures for high-performance video processing, both for our smart camera application and for other video applications. With Vijaykrishnan of Penn State, we studied the power and performance properties of motion estimation algorithms.

Selected papers:

  • Shengqi Yang, Wayne Wolf, and N. Vijaykrishnan, "Search speed and power driven integrated software and hardware optimizations for motion estimation algorithms," in Proceedings, International Conference on Multimedia and Exhibition, IEEE, 2004.
  • Wayne Wolf, Tiehan Lv, and I. Burak Ozer, "An architectural design study for a high-speed smart camera," in Proceedings, 4th Workshop on Media and Streaming Processors, IEEE, 2002.
  • Jason Schlessman and Wayne Wolf, "Leakage power considerations for processor array-based vision systems," in Proceedings, SASIMI 04, 2004.

Networks-on-chips are structured interconnect for systems-on-chips. We studied wave pipelining as a NoC technique and showed that it can save energy as well as run faster. With Joerg Henkel and Srimiat Chakradar of NEC, we developed application-specific architectures for networks-on-chips.

  1. J.Henkel, W.Wolf, and S.Chakradhar, "On Chip Networks: A scalable communication-centric embedded system design paradigm," in Procedings, VLSI Design 2004, IEEE, 2004.
  2. J. Xu, W. Wolf, T. Lv, J. Henkel, and S. Chakradhar, "A case study in networks-on-chip design for embedded video," in Proceedings, DATE 04, IEEE Computer Society Press, 2004.
  3. Jiang Xu and Wayne Wolf, "A wave-pipelined on-chip interconnect structure for networks-on-chips," in Proceedings, Hot Interconnects 2003, IEEE, 2003.

We have studied code compression algorithms and architectures for many years. Most recently, we have concentrated on code compression for VLIW architectures. We developed profile-driven methods that selectively compress code. We also showed how to use LZW-style algorithms for code compression by making use of variable-sized blocks.

Selected papers:

  1. C. H. Lin, W. Wolf, and Y. Xie, "LZW-based code compression for embedded systems," in Proceedings, DATE 04, IEEE Computer Society Press, 2004.
  2. Yuan Xie, Wayne Wolf, and Haris Lekatsas, "Profile-driven code compression," in Proceedings, DATE '03, IEEE Computer Society Press, 2003, pp. 462-467.
  3. Yuan Xie and Wayne Wolf, "Code compression for VLIW using variable-to-fixed coding," in Proceedings, ISSS 2002, IEEE, 2002.

We developed a bus encoding technique that reduces power consumption and can be efficiently implemented. This method uses dictionary encoding, so it does not have to transmit the code words even though they are derived from the data being transmitted.

Selected papers:

  • Tiehan Lv, Joerg Henkel. Haris Lekatsas, and Wayne Wolf, "A dictionary-based en/decoding scheme for low-power data busses," IEEE Transactions on VLSI Systems, 11(5), October 2003, pp. 943-951.

We developed a new approach to the design of microprocessors that are resistant to power attacks. A power attack analyzes power supply dynamic behavior to interpret events within the processor, taking advantage of the fact that different operations take different amounts of energy. We use dynamic voltage and frequency scaling to hide the energy consumption of microprocessor operations:

Our approach makes processor activity less visible with no significant energy consumption penalty and a modest performance penalty. Dynamic voltage frequency scaling is well-known and commercially available so this technique is applicable today.

Selected papers:

  • Shengqi Yang, Wayne Wolf, Vijaykrishnan Narayanan, Dimitrios Serpanos, and Yuan Xie, "Power-attack resistant cryptosystem design: a dynamic voltage and frequency switching approach," in Proceedings, DATE '05 Designers Forum, 2005.

Last revised on August 6, 2008