Computational Electronics Group

School of Electrical and Computer Engineering

Georgia Institue of Technology
Atlanta, Georgia 30332-0250

Located in the Pettit Microelectronics Research Center on the campus of the Georgia Institute of Technology, the Computational Electronics Laboratory is involved in the design, simulation and optimization of new and existing semiconductor devices. Specifically, the Computational Electronics Laboratory analyzes the operation of submicron gate length transistors for ultra-high speed and high frequency operation, heterostructure bipolar transistors, various solid-state photodetectors such as avalanche photodiodes, metal-semiconductor-metal photoconductors and confined quantum state solid-state photomultipliers, and electroluminescent devices. The modeling and simulation of these semiconductor devices is based on a hierarchy of semiconductor device simulation tools. These tools range from first principles formulations involving the solution of the semi-classical Boltzmann equation, the Poisson equation, and where appropriate, the Schroedinger equation to macroscopically oriented simulators such as drift-diffusion and advanced hydrodynamic methods. All of the simulators have been developed by the Computational Electronics Group. The first principles simulators are based on the fundamental solution of the Boltzmann Equation through the ensemble Monte Carlo technique. From the Monte Carlo calculations, a detailed description of the underlying physics of the device behavior can be gleaned. Additionally, input parameters, such as the mobility, diffusivity, etc. can be determined for the macroscopic device simulators. The macroscopic models, principally the hydrodynamic model, provide an excellent description of the output characteristics of a semiconductor device and can be used to compare, guide and analyze experimental data. In this way, new device structures are invented, studied and optimized. The laboratory is equipped with many state-of-the-art computers including: 3 AlphaStation 250 4/166; 1 AlphaStation 600 5/266; 1 DecStation 5000/125; 1 DecStation 5000/200; 1 DecStation 5000/240; 2 P5/166 PCs; 2 P5/100 PCs; 2 486/66 PCs, providing ample computational power.

Faculty Director

Dr. Kevin F. Brennan
Professor
School of Electrical and Computer Engineering
Georgia Institute of Technology
Atlanta, GA 30332

  • Ph.D. Graduates of the Georgia Tech Computational Electronics Group
  • Current Ph.D. Students in the Computational Electronics Group
  • M.S. Students
  • Recent Publications (Past Two Years)
  • Current Research Projects
  • Textbooks
    • For more information about the simulators or for device simulation consulting please contact:
    Kevin Brennan/ kevin.brennan@ee.gatech.edu/ (404) 894-6767

    Previous Pages