Faculty Profile - Arijit Raychowdhury
VLSI Systems and Digital Design
Office: Klaus 2362
Selected Publications, Patents
- A. Raychowdhury, D. Somasekhar, J. Tschanz, and V. De, "A fully-digital phase-locked low dropout regulator in 32nm CMOS," Proceedings of the VLSI Circuit Symposium, June 2012.
- A. Raychowdhury, B. Geuskens, K. Bowman, J. Tschanz, S.-L. Lu, T. Karnik, M. Khellah, V. De, "Tunable Replica Bits for Dynamic Variation Tolerance in 8T SRAM Arrays," Journal of Solid State Circuits (JSSCC), Vol-46, Issue 4, April 2011.
- A. Raychowdhury, B. Geuskens, J. Kulkarni, J. Tschanz, K. Bowman, T. Karnik, S.-L. Lu, V. De, M. Khellah, "PVT & Aging Adaptive Word-Line Boosting for 8T SRAM Power reduction," Proceedings of the International Solid State Circuit Conference (ISSCC), 2010.
- A. Raychowdhury, D. Somasekhar, T. Karnik, V. De, "Design Space and Scalability Exploration of 1T-1STT MTJ Memory Arrays in the Presence of Variability and Disturbances," Digest of International Electron Device Meeting (IEDM), Dec. 2009.
- S. Kumar Gupta, A. Raychowdhury and K. Roy, "Compact models considering incomplete voltage swing in complementary metal oxide semiconductor circuits at ultralow voltages: A circuit perspective on limits of switching energy," Journal of Applied Physics, Vol. 105, Issue 9, 2009.
Last revised on January 09, 2013.