Faculty Profile - Thomas M. Conte
Computer Systems and Software, and VLSI Systems and Digital Design
Office: Klaus 2334
Selected Publications, Patents
- US Patent No. 7,953,955, "Methods and apparatus for automated generation of abbreviated instruction set and configurable processor architecture," S. Y. Larin, P. G. Pechanek and T. M. Conte, issued May 31, 2011, 14 claims.
- J. A. Poovey, B. P. Railing and T. M. Conte, "Parallel pattern detection for architectural improvements," Proceedings of the 3rd USENIX Workshop on Hot Topics in Parallelism (HotPar), (Berkeley, CA), May 26–27, 2011.
- B. V. Iyer and T. M. Conte, "On power and energy trends of IEEE 802.11n PHY," Proceedings of the 12th International ACM Symposium on Modeling Analysis and Simulation of Wireless and Mobile Systems (MSWiM 2009), (Tenerife, Canary Islands, Spain), Oct. 26-19, 2009.
- J. A. Poovey, M. Levy, S. Gal-On, T. M. Conte, "A benchmark characterization of the EEMBC benchmark suite," IEEE Micro, Sep.-Oct. '09.
- B. V. Iyer, J. G. Beu, and T. M. Conte, "Length Adaptive Processors: The solution for Energy/Performance Dilemma in Embedded Systems," INTERACT-13: Workshop on Interaction Between Compilers and Computer Architecture (Held in Conjunction with HPCA), (Raleigh, NC), Feb 16th, 2009.
- B. V. Iyer, J. A. Poovey and T. M. Conte, "Energy-Aware Opcode Design," in Proceedings of the 26th International Conference on Computer Design, (Lake Tahoe, California), Oct. 12-15, 2008.
- B. V. Iyer and T. M. Conte, "A Power Model for Register-Sharing Structures," in Proceedings of the 2008 IFIP Working Conference on Distributed and Parallel Embedded Systems, (Milano, Italy), Sep. 2008.
- P. D. Bryan and T. M Conte, "Combining Cluster Sampling with Single Pass Methods for Efficient Sampling Regimen Design," in Proceedings of the 2007 International Conference, on Computer Design, (Lake Tahoe, CA), Oct. 2007.
- P. D. Bryan, M. C. Rosier and T. M Conte, "Reverse State Reconstruction for Sampled Microarchitectural Simulation," in Proceedings of the 2007 IEEE International Symposium on Performance Analysis of Systems and Software (San Jose, CA), April 2007.
- M. C. Rosier and T. M. Conte, "Treegion Instruction Scheduling in GCC," in Proceedings of the 2006 GCC Developers' Summit, (Ottawa, Canada), June 2006.
- E. Ozer and T. M. Conte, "High-performance and low-cost dual-thread VLIW processor using WELD architecture paradigm," IEEE Transactions on Parallel and Distributed Systems, vol. 16, no. 12, Dec. '05.
- S. Sharma, J. G. Beu and T. M. Conte, "Spectral prefetcher: An effective mechanism for L2 cache prefetching," ACM Transactions on Architecture and Code Optimization, vol. 2 , no. 4, Dec. '05, pp. 423-450.
- H. Zhou and T. M. Conte, "Enhancing memory-level parallelism via recovery-free value prediction," IEEE Transactions on Computers, vol. C-54, no. 7, Jul. '05, pp. 897-912.
Last revised on July 28, 2011.