Faculty Profile - Bo Hong
Computer Systems and Software
Office: Klaus 3312
Selected Publications, Patents
- Baris Taskin and Bo Hong, Improving Line-Based QCA Memory Cell Design Through Dual Phase Clocking, to appear in IEEE Transactions on VLSI, 2008.
- Bo Hong, A Lock-free Multi-threaded Algorithm for the Maximum Flow Problem, MTAAP'08 Workshop on Multithreaded Architectures and Applications, Held in Conjunction With International Parallel and Distributed Processing Symposium (IPDPS 2008).
- Bo Hong and Viktor K. Prasanna, Adaptive Allocation of Independent Tasks to Maximize Throughput, IEEE Transactions on Parallel and Distributed Systems, 18(10): 1420-1435, 2007.
- Baris Taskin and Bo Hong, Dual-Phase Line-based QCA Memory Design, 6th IEEE Conference on Nanotechnology (IEEE-Nano2006), July 2006.
- Yang Yu, Bo Hong and Viktor K. Prasanna, On Communication Models for Algorithm Design for Networked Sensor Systems: A Case Study, Elsevier Pervasive and Mobile Computing Journal, Vol. 1, No. 1, pp. 95-122, March 2005.
- Neungsoo Park, Bo Hong, Viktor K. Prasanna, Tiling, Block Data Layout, and Memory Hierarchy Performance, IEEE Transactions on Parallel and Distributed Systems, 14(7):640-654, July 2003.
Last revised on September 19, 2008.