ECE3055 Fall'99 Homework Assignment #2
Due before 3:00 p.m. Thursday 2/10/00
***START_HW*** (do not delete preceding flag, the ]-XXXX flags, the
problem numbers (pound number period), or square brackets below).
[ ]-NAME Enter your name (form: last, first middle initial)
[ ]-PRISM Enter your Prism account code
[ ]-EMAIL If your Prism account is working, leave blank. If not,
enter the email address ("account@server") where you would
like to receive your graded homework.
#1. Enter the word in ()'s which is the best answer.
In a memory hierarchy, the higher levels are (relative to lower) :
[ Closer ] (Closer , farther) to/from the CPU.
[ Faster ] (Faster, slower) access time.
[ More ] (More, less) expensive.
[ smaller ] (Larger, smaller) memory size.
#2. Answer T (true) or F (false).
[ T ] The design goal is to have a memory nearly as fast as the
fastest level and as large as the cheapest level.
[ F ] In a Direct Mapped Cached, the oldest block is replaced when a
new block is needed.
[ F ] A "hit" means we have to read from a lower level.
[ T ] The Tag concatenated with the Index is the Word address.
[ F ] The Tag concatenated with the Index is the Byte address.
#3. Enter the word in ()'s which is the best answer.
[ increases ] Increasing the block width in a wide memory organization
(increases, decreases) the hit rate.
[ increases ] Increasing the block width in a wide memory organization
(increases, decreases) the miss penalty (size constant).
[ sometimes ] Increasing the block width in a wide memory organization
(always, sometimes, never) improves memory performance.
#4. Having an n-way associative memory:
[ increases ] Increasing n in a n-way associative memory organization
(increases, decreases) the hit rate.
[ * | neither ] Increasing n in a n-way associative memory organization
(increases, decreases) the miss penalty.
[ sometimes ] Increasing n in a n-way associative memory organization
(always, sometimes, never) improves memory performance.
#5. Match answers to questions.
A. Dirty Bit
B. Valid Bit
C. Index
D. Tag
E. Byte Offset
F. Last Bit or Age Count
[ C ] Part of the Block Address not used as Tag.
[ D ] Part of the Block Address not used as Index.
[ E ] Not used to address or flag data in the cache.
[ B ] Flag that shows the Block has been written from lower level.
[ A ] Flag that shows the Block has been just written by the CPU.
[ F ] In an Associative memory, shows which element in a block is the
oldest.
***END_HW*** (v 1.0, web)